beautypg.com

Figureb.3 256 kbyte interface with 150 ns memory, 256 kbyte interface with 150 ns memory – Avago Technologies LSI53C825AE User Manual

Page 289

background image

External Memory Interface Diagram Examples

B-3

Figure B.3

256 Kbyte Interface with 150 ns Memory

LSI53C825A

27C020-15/

MOE/

OE

MCE/

CE

8

MAD[7:0]

Bus

8

A[7:0]

8

A[15:8]

8

MAS0/

MAS1/

8

Note: MAD bus sense logic enabled for 256 Kbytes of fast memory (150 ns device @ 33 MHz). Address latch

for the two most significant bits can be HCT74, HCT174, HCT175, etc.

GPIO4

MWE/

V

PP

Control

+ 12 V

V

PP

WE

Optional - for Flash Memory only, not
required for EEPROMS.

28F020-15/

Socket

D[7:0]

2

2

A[17:16]

V

SS

MAD2

4.7 K

MAD1

4.7 K

D0

D7

Q0

Q7

HCT374

CK

0E

D0

D7

Q0

Q7

HCT374

CK

0E

D0

D1

Q0

Q1

HCT374

CK

0E

GPIO2_MAS2/