Avago Technologies LSI53C825AE - Manual (Page 104)

4-16 Registers
R Reserved [8:6]
DSI Device Specific Initialization 5
This bit is cleared to indicate that the LSI53C825A
requires no special initialization before the generic class
device driver is able to use it.
APS Auxiliary Power Source 4
Because the device does not provide a PME signal, this
bit always returns a 0. This indicates that no auxiliary
power source is required to support the PME signal in the
D3cold power management state.
PMEC PME Clock 3
This bit always returns a zero value because the devices
do not provide a PME signal.
VER[2:0] Version [2:0]
This field is set of 001b to indicate that the device
complies with Revision 1.0 of the PCI Power
Management Interface Specification.
Register: 0x44
Power Management Control/Status
Read Write
This register applies to the LSI53C825AE only and indicates the power
management control and status descriptions.
PST PME Status 15
The LSI53C825A always returns a zero for this bit,
indicating that PME signal generation is not supported
from D3cold.
DSCL Data Scale [14:13]
The LSI53C825A does not support the Data register.
Therefore these two bits are always set to 00b.
DSLT Data Select [12:9]
This device does not support the Data register. Therefore
these four bits are always set to 0000b.
15 14 13 12 9 8 7 2 1 0
PST DSCL DSLT PEN R PWS
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0