Avago Technologies LSI53C825AE User Manual
Page 173
Operating Registers
4-85
HTHSF
Handshake-to-Handshake Timer Scale Factor
4
Setting this bit causes this timer to shift by a factor of 16.
Refer to the
register
description for details.
GEN[3:0]
General Purpose Timer Period
[3:0]
These bits select the period of the general purpose timer.
The time measured is the time between enabling and
disabling of the timer. When this timing is exceeded, the
GEN bit in the
SCSI Interrupt Status One (SIST1)
register
is set. Refer to the table under
, bits [3:0], for the available time-out periods.
Note:
To reset a timer before it expires and obtain repeatable
delays, the time value must be written to zero first, and then
written back to the desired value. This is also required
when changing from one time value to another. See
Chapter 2, “Functional Description,”
for an explanation of
how interrupts are generated when the timers expire.
1101
409.6 ms
6.4 s
1110
819.2 ms
12.8 s
1111
1.6 s
25.6 s
1. These values are correct if the CCF bits in the
register are set according to the
valid combinations in the bit description.
2. 50 MHz clock is not supported for Ultra2 SCSI operation.
Table 4.8
Timeout Periods, 50 MHz Clock (Cont.)
HTH[7:4], SEL[3:0],
GEN[3:0]
1
Minimum Timeout
(50 MHz Clock)
2
GENSF = 0
GENSF = 1