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Figure6.10 pci configuration register write, Pci configuration register write, Figure 6.10 pci configuration register write – Avago Technologies LSI53C825AE User Manual

Page 244

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6-16

Specifications

Figure 6.10 PCI Configuration Register Write

t

1

t

2

CLK

(Driven by System)

FRAME/

(Driven by Master)

Addr
In

Data In

Byte Enable

t

2

t

1

t

2

t

1

t

1

t

2

t

2

t

3

t

2

t

1

t

3

t

2

t

1

AD/

(Driven by Master)

C_BE/

(Driven by Master)

PAR/

(Driven by Master)

IRDY/

(Driven by Master)

TRDY/

(Driven by LSI53C825A)

STOP/

(Driven by LSI53C825A)

DEVSEL/

(Driven by LSI53C825A)

IDSEL

(Driven by Master)

t

1

t

2

CMD