Avago Technologies LSI53C825AE - Manual (Page 213)

Transfer Control Instructions 5-29
5.6 Transfer Control Instructions
This section describes the Transfer Control Instructions. The
configuration of the Opcode bits define which Transfer Control Instruction
to perform.
5.6.1 First Dword
IT[1:0] Instruction Type -
Transfer Control Instruction
[31:30]
The IT bit configuration (10) defines the Transfer Control
Instruction Type.
OPC [2:0] Opcode [29:27]
This 3-bit field specifies the type of Transfer Control
Instruction to execute. All Transfer Control Instructions
can be conditional. They can be dependent on a
true/false comparison of the ALU Carry bit or a
comparison of the SCSI information transfer phase with
the Phase field, and/or a comparison of the First Byte
Received with the Data Compare field. Each instruction
can operate in Initiator or Target mode. Transfer Control
Instructions are shown in the following table.
Jump Instruction
The LSI53C825A can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, then it loads the SCSI First
Byte Received (SFBR) register with the contents of the
DMA SCRIPTS Pointer Save (DSPS) register. The DMA
SCRIPTS Pointer (DSP) register now contains the
address of the next instruction.
OPC2 OPC1 OPC0 Instruction Defined
0 0 0 Jump
0 0 1 Call
0 1 0 Return
0 1 1 Interrupt
1 x x Reserved