Avago Technologies LSI53C825AE - Manual (Page 261)

PCI and External Memory Interface Timing Diagrams 6-33
Figure 6.22 Write Cycle, Normal/Fast Memory (
≥
64 Kbytes), Single Byte Access
CLK
MAD
(Driven by LSI53C825A)
MAS2/
(Driven by LSI53C825A)
MAS0/
(Driven by LSI53C825A)
MCE/
(Driven by LSI53C825A)
MOE/
(Driven by LSI53C825A)
MWE/
(Driven by LSI53C825A)
Higher
Address
Lower
Address
t
12
Middle
Address
t
11
t
13
t
21
t
22f
t
20
t
23
t
24f
t
25 t
26
MAS1/
(Driven by LSI53C825A)
Valid Write Data