Avago Technologies LSI53C825AE - Manual (Page 219)

Transfer Control Instructions 5-35
IF Interrupt-on-the-Fly 20
When this bit is set, the interrupt instruction does not halt
the SCRIPTS processor. Once the interrupt occurs, the
Interrupt-on-the-Fly bit (
Interrupt Status (ISTAT) , bit 2) is
asserted.
JMP Jump If True/False 19
This bit determines whether the LSI53C825A branches
when a comparison is true or when a comparison is false.
This bit applies to phase compares, data compares, and
carry tests. If both the Phase Compare and Data
Compare bits are set, then both compares must be true
to branch on a true condition. Both compares must be
false to branch on a false condition.
CD Compare Data 18
When this bit is set, the first byte received from the SCSI
data bus (contained in the
SCSI First Byte Received
(SFBR) register) is compared with the Data to be
Compared Field in the Transfer Control instruction. The
Wait for Valid Phase bit controls when this compare
occurs. The Jump if True/False bit determines the
condition (true or false) to branch on.
CP Compare Phase 17
When the LSI53C825A is in Initiator mode, this bit
controls phase compare operations. When this bit is set,
the SCSI phase signals (latched by SREQ/) are
compared to the Phase Field in the Transfer Control
instruction. If they match, the comparison is true. The
Wait for Valid Phase bit controls when the compare
occurs. When the LSI53C825A is operating in Target
mode and this bit is set, it tests for an active SCSI SATN/
signal.
Bit 19
Result of
Compare
Action
0 False Jump Taken
0 True No Jump
1 False No Jump
1 True Jump Taken