Altera Video and Image Processing Suite - Manual (Page 77)

Modules Description
Av_st_output
• This module creates the control packets, from the detected
resolution read from the control module, and the video packets,
from the active picture data read from the write_buffer_fifo
module.
• The packets are sent to the Video Output Bridge which turns them
into Avalon-ST video packets.
Clocked Video Interface Parameter Settings
Table 4-10: Clocked Video Input Parameter Settings
Parameter Value Description
Bits per pixel per color plane 4–20, Default = 8 Select the number of bits per pixel (per color
plane).
Number of color planes 1–4, Default = 3 Select the number of color planes.
Color plane transmission format • Sequence
• Parallel
Specify whether to transmit the color planes
in sequence or in parallel.
Field order
• Field 0 first
• Field 1 first
• Any field first
Specify the field to synchronize first when
starting or stopping the output.
Sync signals
• Embedded in video
• On separate wires
Specify whether to embed the synchroniza‐
tion signal in the video stream or provide on
a separate wire.
Add data enable signal On or Off Turn on if you want to use the data enable
signal,
vid_de
. This option is only available if
you choose the DVI 1080p60 preset.
Allow color planes in sequence
input
On or Off Turn on if you want to allow run-time
switching between sequential and parallel
color plane transmission formats. The format
is controlled by the
vid_hd_sdn
signal.
Use vid_std bus On or Off Turn on if you want to use the video
standard,
vid_std
.
Width of vid_std bus 1–16, Default = 1 Select the width of the
vid_std
bus, in bits.
Extract ancillary packets On or Off Select on to extract the ancillary packets in
embedded sync mode.
Interlaced or progressive
• Progressive
• Interlaced
Specify the format to be used when no format
is automatically detected.
4-18 Clocked Video Interface Parameter Settings
UG-VIPSUITE
2015.05.04
Altera Corporation Clocked Video Interface IP Cores
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