Deinterlacing ip cores, Deinterlacing ip cores -1 – Altera Video and Image Processing Suite User Manual
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Deinterlacing IP Cores
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2015.05.04
UG-VIPSUITE
The Deinterlacing IP cores provide deinterlacing algorithms.
Interlaced video is commonly used in television standards such as phase alternation line (PAL) and
national television system committee (NTSC), but progressive video is required by LCD displays and is
often more useful for subsequent image processing functions.
Additionally these cores also provide double -buffering or triple-buffering in external RAM. Double-
buffering helps solve throughput problems (burstiness) in video systems. Triple-buffering provides simple
frame rate conversion.
IP Cores
Feature
Deinterlacer
• Converts interlaced video to progressive video using a
bob, weave, or simple motion-adaptive algorithm
• Provides double -buffering or triple-buffering in external
RAM
Deinterlacer II
• Converts interlaced video to progressive video using
high quality motion-adaptive algorithm. This algorithm
uses a kernel of pixels and significantly enhances the
edge-adaptive reconstruction to improve image quality
• Provides double -buffering in external RAM
• Stores the input video fields in the external memory and
concurrently uses these input video fields to construct
deinterlaced frames
• Provides the option to detect both 3:2 and 2:2 cadences
in the input video sequence and perform a reverse
telecine operation for perfect restoration of the original
progressive video
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