Interfaces, Interfaces -1 – Altera Video and Image Processing Suite User Manual
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Interfaces
2
2015.05.04
UG-VIPSUITE
The IP cores in the Video and Image Processing Suite use standard interfaces for data input and output,
control input, and access to external memory. These standard interfaces ensure that video systems can be
quickly and easily assembled by connecting IP cores together.
The IP cores use the following types of interface:
• Avalon-ST interface—a streaming interface that supports backpressure. The Avalon-ST Video
protocol transmits video and configuration data. This interface type allows the simple creation of video
processing data paths, where IP cores can be connected together to perform a series of video
processing functions.
• Avalon-MM slave interface—provides a means to monitor and control the properties of the IP cores.
• Avalon-MM master interface—when the IP cores require access to a slave interface, for example an
external memory controller.
Figure 2-1: Abstracted Block Diagram Showing Avalon-ST and Avalon-MM Connections
The figure below shows an example of video processing data paths using the Avalon-ST and Avalon-MM
interfaces.
Clocked Video Input
IP Core
Deinterlacer
IP Core
DDR 2 SDRAM
Controller with UniPHY
IP Core
Nios II
Processor
Avalon ST Connection
Avalon MM Master to Slave Connection
Scaler II
IP Core
Clocked Video Output
IP Core
Note: This abstracted view is similar to that provided in the Qsys tool, where interface wires are grouped
together as single connections.
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