Altera Video and Image Processing Suite - Manual (Page 256)

Signal Direction Description
capturen_startofpacket
Input
capturen
port Avalon-ST
startofpacket
signal.
This signal marks the start of an Avalon-ST packet.
capturen_valid
Input
capturen
port Avalon-ST
valid
signal. The IP core
asserts this signal when it produces data.
controln_address
Output
controln
slave port Avalon-MM
address
bus. This
bus specifies a byte address in the Avalon-MM
address space.
controln_burstcount
Output
controln
slave port Avalon-MM
burstcount
signal.
This signal specifies the number of transfers in each
burst.
controln_byteenable
Output
controln
slave port Avalon-MM
byteenable
bus.
controln_debugaccess
Output
controln
slave port Avalon-MM
debugaccess
signal.
controln_read
Output
controln
slave port Avalon-MM
read
signal. The IP
core asserts this signal to indicate read requests from
the master to the system interconnect fabric.
controln_readdata
Input
controln
slave port Avalon-MM
readdata
bus.
These input lines carry data for read transfers.
controln_readdatavalid
Input
controln
slave port Avalon-MM
readdatavalid
signal. The system interconnect fabric asserts this
signal when the requested read data has arrived.
controln_write
Output
controln
slave port Avalon-MM
write
signal. The IP
core asserts this signal to indicate write requests from
the master to the system interconnect fabric.
controln_writedata
Output
controln
slave port Avalon-MM
write
signal. The IP
core uses these input lines for write transfers.
controln_waitrequest
Input
controln
slave port Avalon-MM
waitrequest
signal.
The system interconnect fabric asserts this signal to
cause the master port to wait.
Operating the Trace System from System Console
System Console provides a GUI and a TCL-scripting API that you can use to control the trace system.
20-4 Operating the Trace System from System Console
UG-VIPSUITE
2015.05.04
Altera Corporation Trace System IP Core
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