Video mixing control registers, Video mixing control registers -8 – Altera Video and Image Processing Suite User Manual
Page 119

Signal
Direction
Description
dout_N_ready
Input
dout_N
port Avalon-ST
ready
signal. The downstream
device asserts this signal when it is able to receive data.
dout_N_startofpacket
Output
dout_N
port Avalon-ST
startofpacket
signal. This signal
marks the start of an Avalon-ST packet.
dout_N_valid
Output
dout_N
port Avalon-ST
valid
signal. The IP core asserts
this signal when it produces data.
Video Mixing Control Registers
For efficiency reasons, the Video and Image Processing Suite IP cores buffer a few samples from the input
stream even if they are not immediately processed. This implies that the Avalon-ST inputs for foreground
layers assert ready high, and buffer a few samples even if the corresponding layer has been deactivated.
Table 6-6: Alpha Blending Mixer Control Register Map
The table below describes the control register map for Alpha Blending Mixer IP core.
Address
Register
Description
0
Control
Bit 0 of this register is the
Go
bit, all other bits are unused.
Setting this bit to 0 causes the IP core to stop the next time
control information is read.
1
Status
Bit 0 of this register is the
Status
bit, all other bits are unused.
2
Layer 1 X
Offset in pixels from the left edge of the background layer to
the left edge of layer 1.
3
Layer 1 Y
Offset in pixels from the top edge of the background layer to
the top edge of layer 1.
4
Layer 1 Active
• If set to 0—data from the input stream is not pulled out.
• If set to 1—layer 1 is displayed.
• If set to 2—data in the input stream is consumed but not
displayed. The IP core still propagates the Avalon-ST
packets of type 2 to 14 as usual.
The value of this register is checked at the start of each frame.
If the register is changed during the processing of a video
frame, the change does not take effect until the start of the
next frame.
5
Layer 2 X
The rows in the table are repeated in ascending order for each
layer from 1 to the foreground layer...
6-8
Video Mixing Control Registers
UG-VIPSUITE
2015.05.04
Altera Corporation
Video Mixing IP Cores