Altera Video and Image Processing Suite - Manual (Page 17)

IP Core Configuration ALM RAM DSP
Clocked Video
Output
• Number of color planes in parallel = 3
• Sync signals = On separate wires
• Pixel FIFO size = 1024 pixels
• Use control port = On
• Run-time configurable video modes = 1
512 5 0
Color Plane
Sequencer
• din0: Color planes in parallel = 4
• dout0: Color planes in parallel = 3
• dout1: Color planes in parallel = 1
104 0 0
Color Space
Converter
• Color plane configuration = Three color
planes in parallel
• Run-time control = Off
• Color model conversion = CbCrY': SDTV
to Computer B'G'R'
• Coefficients integer bits = 2
• Summands integer bits = 9
• Coefficient and summand fractional bits =
8
284 0 9
Deinterlacer II
• Number of color planes in parallel = 3
• Deinterlace algorithm = Motion adaptive
• Cadence detection algorithm = 3:2 detector
• Avalon-MM master local ports width =
128
• FIFO depths = 64
3,655 67 3
Frame Buffer
• Number of color planes in parallel = 3
• Avalon-MM master ports width = 128
• Read/write FIFO depth = 64
• Frame dropping = On
• Frame repetition = On
1,084 19 0
Frame Reader
• Number of color planes in parallel = 4
• Avalon-MM master port width = 128
• Read master FIFO depth = 64
• Use separate clocks for the Avalon-MM
master interfaces = On
756 6 0
Gamma Corrector Number of color planes in parallel = 3 142 3 0
UG-VIPSUITE
2015.05.04
In-System Performance and Resource Guidance 1-11
Video and Image Processing Suite Overview Altera Corporation
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