Altera Video and Image Processing Suite User Manual
Page 26
IP Core
Stall Behavior
Error Recovery
Scaler II
• The ratio of reads to writes is
proportional to the scaling ratio and
occurs on both a per-pixel and a per-line
basis.
• The frequency of lines where reads and
writes occur is proportional to the
vertical scaling ratio.
• For example scaling up vertically by a
factor of 2 results in the input being
stalled every other line for the length of
time it takes to write one line of output;
scaling down vertically by a factor of 2
results in the output being stalled every
other line for the length of time it takes
to read one line of input.
• In a line that has both input and output
active, the ratio of reads and writes is
proportional to the horizontal scaling
ratio. For example, scaling from 64×64
to 128×128 causes 128 lines of output,
where only 64 of these lines have any
reads in them. For each of these 64 lines,
there are two writes to every read.
The internal latency of the IP core depends
on the scaling algorithm and whether any
run time control is enabled. The scaling
algorithm impacts stalling as follows:
• Bilinear mode: a complete line of input
is read into a buffer before any output is
produced. At the end of a frame there
are no reads as this buffer is drained.
The exact number of possible writes
during this time depends on the scaling
ratio.
• Polyphase mode with N
v
vertical taps: N
v
– 1 lines of input are read into line
buffers before any output is ready. The
scaling ratio depends on the time at the
end of a frame where no reads are
required as the buffers are drained.
• Receiving an early
endofpacket
signal at the end of an input line—the
IP core stalls its input but continues
writing data until it has sent on
further output line.
• Receiving an early
endofpacket
signal part way through an input line
—the IP core stalls its input for as
long as it would take for the open
input line to complete; completing
any output line that may accompany
that input line. Then continues to
stall the input, and writes one further
output line.
• Not receiving an
endofpacket
signal
at the end of a frame—the IP core
discards extra data until it finds an
end of packet.
1-20
Stall Behavior and Error Recovery
UG-VIPSUITE
2015.05.04
Altera Corporation
Video and Image Processing Suite Overview