Altera Video and Image Processing Suite - Manual (Page 169)

When the bob algorithm is used and synchronization is done on a specific field (input frame rate = output
frame rate), the field that is constantly unused is always discarded. The other field is used to build a
progressive frame, unless it is dropped by the triple-buffering algorithm.
When the bob algorithm is used and synchronization is done on both fields (input field rate = output
frame rate), the behavior is dependent on whether buffering is used. If double or triple-buffering is used,
the bob algorithm behaves like the weave and motion-adaptive algorithms and a strict sequence of F0 and
F1 fields is expected. If two or more fields of the same type are received successively, the extra fields are
dropped. When buffering is not used, the bob algorithm always builds an output frame for each interlaced
input field received regardless of its type.
If passthrough mode for progressive frames has not been selected, the Deinterlacer immediately discards
progressive fields in all its parameterizations.
Handling of Avalon-ST Video Control Packets
When buffering is used, the Deinterlacing IP cores store non-image data packets in memory. Control
packets and user packets are never repeated and they are not dropped or truncated as long as memory
space is sufficient. This behavior also applies for the parameterizations that do not use buffering in
external memory; incoming control and user packets are passed through without modification.
In all parameterizations, the Deinterlacing IP cores generate a new and updated control packet just before
the processed image data packet. This packet contains the correct frame height and the proper interlace
flag so that the following image data packet is interpreted correctly by the following IP cores.
Note: The Deinterlacing IP cores use 0010 and 0011 to encode interlacing values into the generated
Avalon-ST Video packets. These flags mark the output as being progressive and record informa‐
tion about the deinterlacing process. The interlacing is encoded as 0000 when the Deinterlacing IP
cores pass a progressive frame through.
Deinterlacing Parameter Settings
Table 12-3: Deinterlacer Parameter Settings
Parameter Value Description
Maximum image width 32–2600, Default = 640 Specify the maximum frame width in pixels.
The maximum frame width is the default
width at start-up.
12-10 Handling of Avalon-ST Video Control Packets
UG-VIPSUITE
2015.05.04
Altera Corporation Deinterlacing IP Cores
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