Intel STRONGARM SA-1100 - Manual (Page 51)

SA-1100 Developer’s Manual 5-7
Coprocessors
5.2.12 Register 13 – Process ID Virtual Address Mapping
The SA-1100 supports the remapping of virtual addresses through a process ID (PID) register. The
6-bit PID value is OR’ed with bits 30..25 of the virtual address when bits 31..25 of the virtual
address are zero. This effectively remaps the address to one of 64 “slots” in the lower 2 Gbyte
address space. The following table shows the OPC_2 and CRm field encodings used to access the
process ID register. This register is zero at reset and if left unmodified, effectively disables the
remapping function. As such, no explicit enable or disable function is necessary. Reserved bits read
as zero and must be written as zero. This register is readable and writable.
The following figure shows the format of the process ID register.
Function OPC_2 CRm
Access process ID register 0b000 0b0000
0 24 31 25 30
Process ID Reserved r