Intel 80L186EA - Manual

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October 1995
COPYRIGHT INTEL CORPORATION 1995
Order Number 272432-003
80C186EA 80C188EA AND 80L186EA 80L188EA
16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS
Y 80C186 Upgrade for Power Critical Applications
Y Fully Static Operation
Y True CMOS Inputs and Outputs
Y Integrated Feature Set
Static 186 CPU Core
Power Save Idle and Powerdown
Modes
Clock Generator
2 Independent DMA Channels
3 Programmable 16-Bit Timers
Dynamic RAM Refresh Control Unit
Programmable Memory and
Peripheral Chip Select Logic
Programmable Wait State Generator
Local Bus Controller
System-Level Testing Support
(High Impedance Test Mode)
Y Speed Versions Available (5V)
25 MHz (80C186EA25 80C188EA25)
20 MHz (80C186EA20 80C188EA20)
13 MHz (80C186EA13 80C188EA13)
Y Speed Versions Available (3V)
13 MHz (80L186EA13 80L188EA13)
8 MHz (80L186EA8 80L188EA8)
Y Direct Addressing Capability to
1 Mbyte Memory and 64 Kbyte I O
Y Supports 80C187 Numeric Coprocessor
Interface (80C186EA only)
Y Available in the Following Packages
68-Pin Plastic Leaded Chip Carrier
(PLCC)
80-Pin EIAJ Quad Flat Pack (QFP)
80-Pin Shrink Quad Flat Pack (SQFP)
Y Available in Extended Temperature
Range (
b 40 C to a 85 C)
The 80C186EA is a CHMOS high integration embedded microprocessor The 80C186EA includes all of the
features of an ‘‘Enhanced Mode’’ 80C186 while adding the additional capabilities of Idle and Powerdown
Modes In Numerics Mode the 80C186EA interfaces directly with an 80C187 Numerics Coprocessor
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