Intel STRONGARM SA-1100 - Manual (Page 373)

SA-1100 Developer’s Manual A-3
Register Summary
0h B000 0044
DCSR2
DMA control/status register 2 – write ones to set.
0h B000 0048 Write ones to clear.
0h B000 004C Read only.
0h B000 0050 DBSA2 DMA buffer A start address 2.
0h B000 0054 DBTA2 DMA buffer A transfer count 2.
0h B000 0058 DBSB2 DMA buffer B start address 2.
0h B000 005C DBTB2 DMA buffer B transfer count 2.
0h B000 0060 DDAR3 DMA device address register 3.
0h B000 0064
DCSR3
DMA control/status register 3 – write ones to set.
0h B000 0068 Write ones to clear.
0h B000 006C Read only.
0h B000 0070 DBSA3 DMA buffer A start address 3.
0h B000 0074 DBTA3 DMA buffer A transfer count 3.
0h B000 0078 DBSB3 DMA buffer B start address 3.
0h B000 007C DBTB3 DMA buffer B transfer count 3.
0h B000 0080 DDAR4 DMA device address register 4.
0h B000 0084
DCSR4
DMA control/status register 4 – write ones to set.
0h B000 0088 Write ones to clear.
0h B000 008C Read only.
0h B000 0090 DBSA4 DMA buffer A start address 4.
0h B000 0094 DBTA4 DMA buffer A transfer count 4.
0h B000 0098 DBSB4 DMA buffer B start address 4.
0h B000 009C DBTB4 DMA buffer B transfer count 4.
0h B000 00A0 DDAR5 DMA device address register 5.
0h B000 00A4
DCSR5
DMA control/status register 5 – write ones to set.
0h B000 00A8 Write ones to clear.
0h B000 00AC Read only.
0h B000 00B0 DBSA5 DMA buffer A start address 5.
0h B000 00B4 DBTA5 DMA buffer A transfer count 5.
0h B000 00B8 DBSB5 DMA buffer B start address 5.
0h B000 00BC DBTB5 DMA buffer B transfer count 5.
Physical Address Symbol Register Name