Intel STRONGARM SA-1100 - Manual (Page 16)

xvi SA-1100 Developer’s Manual
16.4 Instruction Register.......................................................................................... 16-2
16.5 Public Instructions ........................................................................................... 16-2
16.5.1 EXTEST (00000) ................................................................................ 16-3
16.5.2 SAMPLE/PRELOAD (00001) ............................................................. 16-3
16.5.3 CLAMP (00100) .................................................................................. 16-3
16.5.4 HIGHZ (00101) ................................................................................... 16-4
16.5.5 IDCODE (00110) ................................................................................ 16-4
16.5.6 BYPASS (11111) ................................................................................ 16-4
16.6 Test Data Registers ......................................................................................... 16-5
16.6.1 Bypass Register ................................................................................. 16-5
16.6.2 SA-1100 Device Identification (ID) Code Register.............................. 16-6
16.6.3 SA-1100 Boundary-Scan (BS) Register ............................................. 16-6
16.7 Boundary-Scan Interface Signals .................................................................... 16-7
A Register Summary ......................................................................................................... A-1
B 3.6864–MHz Oscillator Specifications............................................................................ B-1
B.1 Specifications .................................................................................................... B-1
B.1.1
System Specifications .......................................................................... B-1
B.1.1.1. Parasitic Capacitance Off-chip
Between PXTAL and PEXTAL................................................. B-2
B.1.1.2. Parasitic Capacitance Off-chip
Between PXTAL or PEXTAL and VSS .................................... B-2
B.1.1.3. Parasitic Resistance Between PXTAL and PEXTAL ............... B-2
B.1.1.4. Parasitic Resistance Between PXTAL or PEXTAL and VSS... B-2
B.1.2 Quartz Crystal Specification ................................................................. B-3
C 32.768–kHz Oscillator Specifications............................................................................. C-1
C.1 Specifications ....................................................................................................C-1
C.1.1
System Specifications ..........................................................................C-1
C.1.1.1. Temperature Range.................................................................C-1
C.1.1.2. Current Consumption...............................................................C-1
C.1.1.3. Startup Time ............................................................................C-1
C.1.1.4. Frequency Shift Due to Temperature Effect on the Circuit ......C-2
C.1.1.5. Parasitic Capacitance Off-chip
Between TXTAL and TEXTAL .................................................C-2
C.1.1.6. Parasitic Capacitance Off-chip
Between TXTAL or TEXTAL and VSS.....................................C-2
C.1.1.7. Parasitic Resistance Between TXTAL and TEXTAL ...............C-2
C.1.1.8. Parasitic Resistance Between TXTAL or TEXTAL and VSS ...C-2
C.1.2 Quartz Crystal Specification .................................................................C-3
D Internal Test ................................................................................................................... D-1
D.1 Test Unit Control Register (TUCR) ....................................................................D-1