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8 register 7 – cache control operations, 9 register 8 – tlb operations, Register 7 – cache control operations -5 – Intel STRONGARM SA-1100 User Manual

Page 49: Register 8 – tlb operations -5

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SA-1100 Developer’s Manual

5-5

Coprocessors

5.2.8

Register 7 – Cache Control Operations

Register 7 is a write-only register. The CRm and OPC_2 fields are used to encode the cache control
operations. Operation for all other values for OPC_2 and CRm is unpredictable.

5.2.9

Register 8 – TLB Operations

Register 8 is a write-only register. The CRm and OPC_2 fields are used to encode the following
TLB flush operations. Operation for all other values of OPC_2 and CRm is unpredictable.

Function

OPC_2

CRm

Data

Flush I+D

0b000

0b0111

Ignored

Flush I

0b000

0b0101

Ignored

Flush D

0b000

0b0110

Ignored

Flush D single entry

0b001

0b0110

Virtual address

Clean Dcache entry

0b001

0b1010

Virtual address

Drain write buffer

0b100

0b1010

Ignored

Function

OPC_2

CRm

Data

Flush I+D

0b000

0b0111

Ignored

Flush I

0b000

0b0101

Ignored

Flush D

0b000

0b0110

Ignored

Flush D single entry

0b001

0b0110

Virtual address