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1 cacheable bit – c, 1 cacheable reads – c = 1, 2 noncacheable reads – c = 0 – Intel STRONGARM SA-1100 User Manual

Page 57: 2 bufferable bit – b, Bufferable bit – b -3

1 cacheable bit – c, 1 cacheable reads – c = 1, 2 noncacheable reads – c = 0 | 2 bufferable bit – b, Bufferable bit – b -3 | Intel STRONGARM SA-1100 User Manual | Page 57 / 388 1 cacheable bit – c, 1 cacheable reads – c = 1, 2 noncacheable reads – c = 0 | 2 bufferable bit – b, Bufferable bit – b -3 | Intel STRONGARM SA-1100 User Manual | Page 57 / 388
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