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11 transmit and receive fifos, 12 cpu and dma register access sizes, 2 sdlc register definitions – Intel STRONGARM SA-1100 User Manual

Page 234: 2 sdlc register definitions -84

11 transmit and receive fifos, 12 cpu and dma register access sizes, 2 sdlc register definitions | 2 sdlc register definitions -84 | Intel STRONGARM SA-1100 User Manual | Page 234 / 388 11 transmit and receive fifos, 12 cpu and dma register access sizes, 2 sdlc register definitions | 2 sdlc register definitions -84 | Intel STRONGARM SA-1100 User Manual | Page 234 / 388