Zilog Z16C35 User Manual

Page 89

ISCC

User Manual

UM011002-0808

Then the Loop Mode bit (D1) in WR10 should be set to “1”. When all of this is complete
the transmitter may be enabled by setting bit D3 of WR5 to “1”. Now that the transmitter
is enabled, the CRC generator may be initialized by issuing the Reset Tx CRC Generator
command in WR0. The receiver is enabled by setting the Go Active on Poll bit (D4) in
WR10 to “1”. The ISCC will go on the loop when seven consecutive “1s” are received,
and will signal this by setting the On Loop bit in RR10. Note that the seven consecutive
“1s” will set the Break/Abort and Hunt bits in RR0 also. Once the ISCC is on the loop, the
Go Active on Poll bit should be set to “0” until a message is to be transmitted on the loop.
To transmit a message on the loop, the Go Active on Poll bit should be set to “1”. At this

Table 4–22. SDLC Loop Mode Initialization

Register

Bit No

Description

WR4

5-4

Select SDLC mode

WR10

Select CRC preset value

Select mark/flag idle bit

WR7

Flag

WR3

7-6

Select bits per character for receiver

Sync character load inhibit

Address search mode

Auto enables

WR5

6-5

Select bits per character for transmitter

Send break

Select SDLC CRC

WR4

1-0

Select parity

7-6

Select clock mode

WR6

0-7

Address

WR10

6-5

Select data encoding

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