Zilog Z16C35 User Manual
Page 254
Application Note
Serial Communication Controller (SCC
™
): SDLC Mode of Operation
11-11
1
Figure 6. SDLC Loop Mode
TxD (Master), RxD (Slave)
TxD (Slave)
/INT (Slave)
/INT (Master)
81h
EOP
Note 1
42h
0ffh
42h
CRC
EOP
Note 5
Note 4
Note 7
0aah
55h
55h
0aah
CRC
Note 10
Ext/Stat
(Break/Abort set)
➘
Ext/Stat
(Break/Abort set)
➘
Note 3
Ext/Stat
(Break/Abort clr)
➘
RCA
➘
➘
➘
➘
➘
RCA
RCA
RCA
RCA
Sp. Cond
Ext/Stat
(Break/Abort Set)
TxBE
TxBE
➘
Tx Underrun
➘
➘
➘
RCA
RCA
RCA
Sp. Cond
TxBE
➘
TxBE
➘
TxBE
➘
➚
➘
RCA
➘
RCA
TxBE
➘
➘
RCA
➘
RCA
➘
RCA
➘
RCA
➘
RCA
➘
Sp. Cond
Note 6
Note 8
Note 2
EOP
Note 9
RCA: Receive Character Available Interrupt
TxBE: Tx Buffer Empty Interrupt
Page 248 of 316
UM011002-0808
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