Zilog Z16C35 - Manual (Page 73)

ISCC
User Manual
UM011002-0808
67
Up to two modem control signals associated with the receiver are available in synchronous
modes: DTR/REQ and DCD. The /DTR//REQ pin carries the inverted state of the DTR bit
(D7) in WR5 unless this pin has been programmed to carry a DMA Request signal. The /
DCD pin is ordinarily a simple input to the DCD bit in RR0. However, if the Auto Enables
mode is selected by setting D5 of WR3 to “1”, this pin becomes an enable for the receiver.
Then if Auto Enables is ON and the /DCD pin is High the receiver is disabled; while the /
DCD pin is Low the receiver is enabled.
The initialization sequence for the receiver in character-oriented mode is WR4 first, to
select the mode, then WR10 to modify it if necessary, WR6 and WR7 to program the sync
characters and then WR3 and WR5 to select the various options. At this point the other
registers should be initialized as necessary. When all this is completed the receiver is
enabled by setting bit 0 of WR3 to a one. A summary is shown in Table 4-9.
Table 4–17. Initializing the Receiver in Character Oriented Mode
Register Bit No Description
WR4 4-5 Select sync character
WR10 0 Length
WR4 4-5 Select external sync
WR6 0-7 Sync character, lower byte
WR7 0-7 Sync character, upper byte
WR3 1 Sync character inhibit
4 Enter hunt mode
WR3 6-7 Number of bits/character
WR4 0-1 Select parity
WR5 2 Select CRC
WR10 7 CRC generator initial state
WR0 7-6 Reset CRC generator
WR3 0 CRC enable
WR5 7 DTR/REQ
WR3 5 Auto enableh
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