Zilog Z16C35 - Manual (Page 183)

Application Note
The Z180™ Interfaced with the SCC at MHZ
7-6
(Continued)
Figure 4a. Memory Interface Logic
G
/G2A
/G2B
C
B
A
A9
A18
A17
A16
A15
/Y9
/Y6
/Y5
/Y4
/Y3
/Y2
/Y1
/Y0
/38000 ~
/30000 ~
/28000 ~
/20000 ~
/18000 ~
/10000 ~
/08000 ~ To 55257 /E Pin
/00000 ~ To 27C256 /E Pin
HCT138
/RD
/MREQ
/WR
* /MEMR To 27C56 /OE,
55257 /OE Pin
* /MEMW To 55257 /WE Pin
/RD to /OE Pin of 27C256 and 55257
/WR To /WE Pin of 55257 *
Figure 4b. Memory Interface Logic
4.7 K
Ω
x2
/CSRAM To 55257 /CE Pin
/CSROM To 27C256 /CE Pin
/USRRAM
/IORQ
A15
/USRROM
HCT10
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UM011002-0808