Zilog Z16C35 - Manual (Page 208)

Application Note
The Z180™ Interfaced with the SCC at MHZ
7-31
7
db 01h ;select WR1
db 01100000b ;REQ on Rx
db 02h ;select WR2
db 00h ;00h as vector base
db 03h ;select WR3
db 11000000b ;Rx 8bit/char
db 05h ;select WR5
db 01100000b ;tx 8bit/char
db 06h ;select WR6
db 00h ;
db 07h ;select WR7
db 00h ;
db 09h ;select WR9
db 00000001b ;stat low, vis
db 0ah ;select WR10
db 00000000b ;set as default
db 0bh ;select WR11
db 01010110b ;
; 0 No xtal
; 1010 TxC,RxC from BRG
; 110 TRxC = BRG output
db 0ch ;select WR12
db 00h ;BR TC Low
db 0dh ;select WR12
db 00h ;BR TC high
db 0eh ;select WR14
db 00010110b ;
; 000 nothing about DPLL
; 1 Local loopback
; 0 No local echo
; 1 DTR/REQ is req
; 1 BRG source = PCLK
; 0 Not enabling BRG yet
db 0eh ;select WR14
db 00010111b ;
; 000 nothing about DPLL
; 1 Local loopback
; 0 No local echo
; 1 DTR/REQ is REQ
; 1 BRG source = PCLK
; 1 Enable BRG
db 03h ;select WR3
db 11000001b ;rx enable
Table 14. Test Program – Z180/SCC DMA Transfer (Continued)
Page 202 of 316
UM011002-0808