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Iscc user manual – Zilog Z16C35 User Manual

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ISCC

User Manual

UM011002-0808

77

Table 4–20. Residue Codes

As indicated in the table, these bits allow the processor todetermine those bits in the infor-
mation (and not CRC) field. This allows transparent retransmission of the received frame.
The Residue Code bits do not go through a FIFO so they change in RR1 when the last
character of the frame is loaded into the receive data FIFO. If there are any characters
already in the receive data FIFO the Residue Code will be updated before they are read by
the processor.

As an example of how the codes are interpreted, consider the case of eight bits per charac-
ter and a residue code of 101. The number of valid bits for the previous, second previous,
and third previous bytes are 0, 7, and 8 respectively. This indicates that the information
field (I-field) boundary falls on the second previous byte as shown in Figure 4-14.

Figure 4–29. Residue Code 101 Interpretation

A frame is terminated by the detection of a closing flag. Upon detection of the flag the fol-
lowing actions take place: the contents of the Receive Shift Register are transferred to the
receive data FIFO, the Residue Code is latched, the CRC Error bit is latched and the End
of Frame upon reaching the top of the FIFO can cause a special receive condition. The
processor can then read RR1 to determine the result of the CRC calculation as well as the
Residue Code.

Only the CRC-CCITT polynomial may be used for CRC calculation in SDLC mode,
although the generator and checker may be preset to all “1s” or all “0s”. The CRC-CCITT
polynomial is selected by setting bit D2 of WR5 to “0”, bit D7 of WR10 controls the pre-

Residue Code

Bits in Previous Byte

Bits in Second Previous Byte

Bits in Third Previous Byte

2 1 0

8B/C

7B/C

6B/C

5B/C

8B/C

7B/C

6B/C

5B/C

8B/C

7B/C

6B/C

5B/C

100

0

0

0

0

3

1

0

0

8

7

5

2

010

0

0

0

0

4

2

0

0

8

7

6

3

110

0

0

0

0

5

3

1

0

8

7

6

4

001

0

0

0

0

6

4

2

0

8

7

6

5

101

0

0

0

0

7

5

3

1

8

7

6

5

011

0

0

0

8

6

4

8

7

6

111

1

0

8

7

8

7

000

2

8

8

7 Bits

I-Field

CRC Field

Third Previous

Byte

Second Previous

Byte

Previous Byte

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