Maxim Integrated MAXQ7666 - Manual (Page 309)

11.3.2.2 Breakpoint Register 4 (BP4)
Register Description: Breakpoint Register 4
Register Name: BP4
This register is accessible only via background mode read/write commands.
When (REGE = 0): This register serves as one of the two data memory address breakpoints. When DME is set in background mode,
the debug engine monitors the data memory address bus activity while the CPU is executing the user program. If an address match
is detected, a break occurs, allowing the debug engine to take over control of the CPU and enter debug mode.
When (REGE = 1): This register serves as one of the two register breakpoints. A break occurs when the destination register address
for the executed instruction matches with the specified module and index. When used as register breakpoint, the bits BP4.3:BP4.0 are
recognized as module specifier and bits BP4.8:BP4.4 are recognized as the register index within the module. The bits BP4.15:BP4.9
are ignored.
This register defaults to FFFFh after a power-on reset or test-logic-reset TAP state.
Bits 15 to 0: Breakpoint Register 4 Bits 15 to 0 (BP4.15 to BP4.0)
MAXQ7665/MAXQ7666 User’s Guide
11-13
Bit # 15 14 13 12 11 10 9 8
Name BP4.15 BP4.14 BP4.13 BP4.12 BP4.11 BP4.10 BP4.9 BP4.8
Reset 1 1 1 1 1 1 1 1
Access s s s s s s s s
Bit # 7 6 5 4 3 2 1 0
Name BP4.7 BP4.6 BP4. 5 BP4.4 BP4.3 BP4.2 BP4.1 BP4.0
Reset 1 1 1 1 1 1 1 1
Access s s s s s s s s
s = special (accessible only by background mode read/write commands)
Maxim Integrated