beautypg.com

Figure 7-3. type 2 timer mode selection -18, Figure 7-4. output enable and polarity control -18 – Maxim Integrated MAXQ7666 User Manual

Page 253

background image

MAXQ7665/MAXQ7666 User’s Guide

7-18

T2CLx

EDGE DETECTION

AND GATING

C/T2

TR2L

T2MD

T2CLK

CCF[1:0]

G2EN

TR2
SS2

T2POL[0]

T2Lx

T2Lx COMPARE MATCH

T2Vx COMPARE MATCH
OR T2Hx COMPARE MATCH

T2Lx OVERFLOW

T2Vx OVERFLOW
OR T2Hx OVERFLOW

T2RLx

Tx PIN INPUT

T2CHx

T2Hx

T2RHx

Figure 7-3. Type 2 Timer Mode Selection

T2Vx

16-BIT TIMER

OR

T2Hx 8-TIMER

POSSIBLE INPUT USE:

TIMER GATE EDGE

CAPTURE/RELOAD

EDGE COUNTER

T2OE[0]

POx.x DATA

(IF PDx.x = 1)

Tx PIN

T2POL[0]

Figure 7-4. Output Enable and Polarity Control

Maxim Integrated

This manual is related to the following products:
See also other documents in the category Maxim Integrated Hardware: