GW Instek PEL-3000 Series Programming Manual - Manual (Page 160)

PEL-3000 Programming Manual
158
Status Byte Register
Overview The Status Byte register consolidates the status
events of all the status registers. The Status Byte
register can be read with the *STB? query or a
serial poll and can be cleared with the *CLS
command.
Status Byte Register
8
3
4
2
2
1
1
0
QUES CSUM ERR 0
128
7
64
6
32
5
16
4
OPER MSS ESB MAV
Bit weight
Bit Position
Condition
Status Bits ERR: The ERR bit is set when there is a message
in the error queue.
CSUM: The CSUM bit is set when an event has
occurred in the CSummary Status Register
group.
QUES: The QUES bit is set when an event has
occurred in the Questionable Status Register
group.
MAV: The MAV bit is set when there is
outstanding data in the Output Queue.
ESB: The Event Status bit is set if an enabled
event in the Standard Event Status Register
group has occurred.
MSS & RQS: The Master Summary Status is
used with the *STB? query. When the *STB?
query is read, the MSS bit is not cleared. The
Request Service bit is cleared when it is polled
during a serial poll.
OPER: The OPER bit is set when if an enabled
event in the Operation Status Register has
occurred.