GW Instek PEL-2000 Series Programming User Manual - Manual (Page 164)

PEL-2000 Programming Manual
164
Channel Status
Description Each channel has a dedicated Channel Status
Register group. These registers show if any errors
or faults have occurred to a specific channel.
The Channel Status Register group consists of: the
Condition, EVENT and ENABLE registers as well
as PTR/NTR (positive and negative transition)
filters.
Channel Status Registers
8
3
4
2
2
1
1
0
RV OP OV OC
7-15
0
Bit weight
Bit Position
Condition
RV OP OV OC 0 PTR/NTR
RV OP OV OC 0 EVENT
RV OP OV OC 0 ENABLE
UVP G/N OT
UVP G/N OT
UVP G/N OT
UVP G/N OT
6 5 4
64 32 16
Protection Bits OC If an over current condition occurs the
OC bit (bit 0) is set. The OC bit can only
be cleared with
the :LOAD:PROTection:CLEar command.
OV If an over voltage condition occurs the
OV bit (bit 1) is set. The OV bit can only
be cleared with
the :LOAD:PROTection:CLEar command.
OP If an over power condition occurs the OP
bit (bit 2) is set. The OP bit can only be
cleared with
the :LOAD:PROTection:CLEar command.
RV If a reverse voltage condition occurs the
RV bit (bit 3) is set. The RV bit is
automatically cleared after the reverse
voltage is removed.
OT When the internal temperature exceeds
85˚C the OT bit will be set. The OT bit is
automatically cleared after the
temperature goes below 85˚C.