Toshiba H1 Series - Manual (Page 326)

TMP92CZ26A
92CZ26A-323
(8) Transmission controller
• In I/O Interface Mode
In SCLK Output Mode with the setting SC0CR = 0, the data in the
Transmission Buffer is output one bit at a time to the TXD0 pin on the rising edge or
falling of the shift clock which is output on the SCLK0 pin, according to the
SC0CR setting.
In SCLK Input Mode with the setting SC0CR = 1, the data in the Transmission
Buffer is output one bit at a time on the TXD0 pin on the rising or falling edge of the
SCLK0 input, according to the SC0CR setting.
• In UART Mode
When transmission data sent from the CPU is written to the Transmission Buffer,
transmission starts on the rising edge of the next TXDCLK.