Toshiba H1 Series User Manual
Page 322

TMP92CZ26A
92CZ26A-319
• Integer divider (N divider)
For example, when the source clock frequency (f
c
) is 19.6608 MHz, the input
clock is
φT2, the frequency divider N (BR0CR
BR0CR
*Clock state System clock
:
1/1
Prescaler clock
:
1/2
Baud Rate
= = 19.6608106 Ч 10
6
ч 16 ч 8 ч 16 = 9600 (bps)
Note: The N + (16 – K) / 16 division function is disabled and setting BR0ADD
• N+(16-K)/16 divider (UART Mode only)
Accordingly, when the source clock frequency (fc) = 15.9744 MHz, the input
clock is
φT2, the frequency divider N (BR0CR
(BR0ADD
Mode is as follows:
*Clock state System clock
:
1/1
Prescaler clock
:
1/2
Baud Rate
= ч 16 = 15.9744 Ч 10
6
ч 16ч (6 + ) ч 16
= 9600 (bps)
Table 3.14.2 show examples of UART Mode transfer rates.
Additionally, the external clock input is available in the serial clock. (Serial
Channel 0). The method for calculating the baud rate is explained below:
• In UART Mode
Baud rate = external clock input frequency
÷ 16
It is necessary to satisfy (external clock input cycle)
≥ 4/f
SYS
• In I/O Interface Mode
Baud rate = external clock input frequency
It is necessary to satisfy (external clock input cycle)
≥ 16/f
SYS
÷ 16
f
C
/16
8
f
C
/16
6 + (16 – 8)
16
8
16