Toshiba H1 Series - Manual (Page 319)

TMP92CZ26A
92CZ26A-316
3.14.1 Block Diagram
Figure 3.14.2 Block Diagram
Selector
φT0
φT2
φT8
φT32
SC0MOD0
Receive buffer 1 (Shift register)
RXDCLK
SC0MOD0
Pr
escaler
Selector
TA0TRG
(from TMRA0)
UART
mode
BR0CR
Baud rate generator
Selector
SC0MOD0
Selector
÷2
I/O interface mode
SC0CR
Receive counter
(UART only ÷ 16)
Transmision
counter
(UART only ÷ 16)
Receive
control
Transmission
control
INTRX0
INTTX0
Receive buffer 2 (SC0BUF) RB8 Error flag
SC0CR
Serial channel
interrupt control
TB8
CTS0
TXD0 Transmission buffer (SC0BUF)
RXD0
TXDCLK
SC0MOD0
f IO
SC0MOD0
SCLK0
SCLK0
SIOCLK
Internal data bus
Parity control
SC0CR
Serial clock generation circuit
BR0CR
BR0ADD
BR0CR
I/O interface mode
φT0
2 64 4 8 16 32
Prescaler
φT2 φT8 φT32
INT request