Artesyn ATCA-7480 Installation and Use (February 2015) - Manual (Page 316)

IPMI Feature Set
ATCA-7480 Installation and Use (6806800T17A) 316
9.12.2 Fail Safe Logic
Failsafe is a mechanism, implementing automatic BIOS boot bank crisis recovery. It observes
the BIOS boot phase to swap the BIOS boot banks and to reset the processor in case the boot
firmware hangs accidentally.
Failsafe can be enabled or disabled at any time with:
 IPMI OEM command called Set/Get Feature Configuration and parameter #224.
For details, see
Set Feature Configuration on page 256 .
 BIOS setup menu
Typically, failsafe is used to protect a BIOS firmware upgrade to recover, even when the boot
image programmed does not work, is damaged, or has an unpredictable error.
Failsafe is implemented within the IPMI management controller. In case the firmware does not
boot and the BMC watchdog expires, the IPMI management controller will swap the boot
banks before resetting the CPU. Thus the blade can recover by booting from its redundant boot
flash, which contains the old active firmware image, which did work before firmware upgrade.