Artesyn ATCA-7480 Installation and Use (February 2015) - Manual (Page 138)

Maps and Registers
ATCA-7480 Installation and Use (6806800T17A) 138
The Payload Power Failure Cause Register 3 covers CPU specific voltages. When a CPU is not
mounted (detected via CPU0_SKTOCC_ and CPU1_SKTOCC_), the corresponding power
failure bits will never be set.
Table 5-51 Payload Power Failure Cause Register 3
Address Offset: 0x0D
Bit Description Default Access
0 VPP CPU0 power good failure (signal
PWRGD_PVPP_ABCD):
0: No VPP CPU0 power issue.
1: VPP CPU0 power failure. PWR_GOOD:0 IPMC: r
1 VPP CPU1 power good failure (signal
PWRGD_PVPP_EFGH):
0: No VPP CPU1 power issue.
1: VPP CPU1 power failure. PWR_GOOD:0 IPMC: r
2 VDD CPU0 power good failure (signal
PWRGD_VDD_ABCD):
0: No VDD CPU0 power issue.
1: VDD CPU0 power failure. PWR_GOOD:0 IPMC: r
3 VDD CPU1 power good failure (signal
PWRGD_VDD_EFGH):
0: No VDD CPU1 power issue.
1: VDD CPU1 power failure. PWR_GOOD:0 IPMC: r
4 VTT CPU0 power good failure (signal
PWRGD_VTT_ABCD):
0: No VTT CPU0 power issue.
1: VTT CPU0 power failure. PWR_GOOD:0 IPMC: r
5 VTT CPU1 power good failure (signal
PWRGD_VTT_EFGH):
0: No VTT CPU1 power issue.
1: VTT CPU1 power failure. PWR_GOOD:0 IPMC: r