Artesyn ATCA-7480 Installation and Use (February 2015) - Manual (Page 136)

Maps and Registers
ATCA-7480 Installation and Use (6806800T17A) 136
The tables below shows more details about the payload power failure. The Payload Power
Failure Registers 1 to 3 content is always 0, when the Payload Power Failure status (bit 7) of
Payload Power Failure State Register (
Table 5-47 ) is not set.
The Payload Power Failure Cause Register 2 covers the main board voltages.
Table 5-49 Payload Power Failure Cause Register 1
Address Offset: 0x0B
Bit Description Default Access
0 Payload wakeup failure:
0: No wakeup issue. Board wakes up within 5s timeout.
1: Wakeup failure. Board does not wake up (SLP_S3_
stays low) within 5s timeout PWR_GOOD:0 IPMC: r
1 VCCIO power good failure (signal PWRGD_PVCCIO):
0: No VCCIO power issue.
1: VCCIO power failure. PWR_GOOD:0 IPMC: r
6:2 Reserved 0 IPMC: r
7 Thermtrip failure (signal THERMTRIP_:
0: No Thermtrip issue
1: Thermtrip detected. THERMTRIP_ was asserted in
S0 state PWR_GOOD:0 IPMC: r
Table 5-50 Payload Power Failure Cause Register 2
Address Offset: 0x0C
Bit Description Default Access
0 12V power good failure (signal PWRGD_VP12):
0: No 12V power issue.
1: 12V power failure. PWR_GOOD:0 IPMC: r
1 5V aux power good failure (signal
PWRGD_VP5AUX):
0: No 5V aux power issue.
1: 5V aux power failure. PWR_GOOD:0 IPMC: r