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Zilog Z80230 User Manual

Page 262

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SCC/ESCC

User Manual

UM010903-0515

Application Notes

255

J19 is factory set according to the size of the SRAMs provided.
For 32K x 8 SRAMs, jumpers are installed between J19-J2 and J19-J3, and between J19-J5 and

J19-J6, with J19-J1 and J19-J4 left open.
For 128K x 8 SRAMs, jumpers are installed between J19-J1 and J19-J2, and between J19-J4 and

J19-J5, with J19-J3 and J19-J6 left open.
32K x 8 SRAMs have cyclic/redundant addressing starting at

40000

,

80000

, and

C0000

. The

only configuration in which this causes problems is with three pairs of 32K x 8 SRAMs and

275122 EPROMs. In this case, there is a conflict in the range

E0000-EFFFF

.

This conflict can be avoided by any of the 

following methods:

Using two pairs of 32K x 8 SRAMs

Using one pair of 128K x 8 SRAMs

Using 27256 EPROMs, or

Using 27512 EPROMs but programming 

the size of UCS like they are 27256s

Since the LCS output of the 80186 is not used, the LCMS register in the 80186 is not written with

any value.

Programming the Peripheral Chip Selects

The 80186 allows the PCS6-PCS0 pins, which in this case select the various Datacom controllers,

to be asserted for a selected 896-Byte block of addresses. The block may reside in either memory

or I/O space depending on the values programmed into the PACS and MPCS registers, locations

A4H

and

A8H

of the 80186’s Peripheral Control Block, respectively.

The choice of address space depends on the needs of the customer’s application and the configura-

tion of software supplied with the board as listed in Table . The 81 in the MS Byte of the MPCS 

values (see Table ) makes each MCS3-MCS0 pin correspond to a 2 KB block of addresses in 

memory space. The actual active pin addresses are determined by the value written into the

MMCS register, location

A6H

of the 80186 Peripheral Control Block.

One pair of 128K x 8

devices

256 KB at

00000-

3FFFF

Two pair of 128K x 8

devices

512 KB at

00000-

7FFFF

Three pair of 128K x 8

devices

768 KB at

00000-

BFFFF

Standard Memory Populations

One pair of 32K x 8

devices

64 KB at

00000-

0FFFF

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