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Figure42 parallel port b registers, Figure 4-2, Parallel port b registers -4 – Motorola DSP56012 User Manual

Page 84: Figure 4-2 parallel port b registers, Parallel host interface port b configuration

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4-4

DSP56012 User’s Manual

MOTOROLA

Parallel Host Interface

Port B Configuration

Figure 4-2 Parallel Port B Registers

BC1

BC0

Function

0

0

Parallel I/O (Reset Condition)

0

1

HI

1

0

HI (with HACK pin as GPIO)

1

1

Reserved

BDx

Data Direction

0

Input (Reset Condition)

1

Output

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

BC

1

BC

0

X:$FFEC

Port B Control
Register

0

0

0

0

0

0

0

0

BD

14

BD

13

BD

12

BD

11

BD

10

BD

9

BD

8

BD

7

BD

6

BD

5

BD

4

BD

3

BD

2

BD

1

BD

0

23

0

X:$FFED

Port B Data
Direction
Register

23

0

X:$FFEE

Port B Data
Register

0

0

0

0

0

0

0

0

PB

14

PB

13

PB

12

PB

11

PB

10

PB

9

PB

8

PB

7

PB

6

PB

5

PB

4

PB

3

PB

2

PB

1

PB

0

23

0

AA0308.11

(PBC)

(PBDDR)

(PBD)

0

0