Motorola DSP56012 - Manual (Page 196)

6-18 DSP56012 User’s Manual MOTOROLA
Serial Audio Interface
Serial Audio Interface Programming Model
6.3.4.3 TCS Transmitter 2 Enable (T2EN)—Bit 2
The read/write control bit T2EN enables the operation of the SAI Transmitter 2.
When T2EN is set, Transmitter 2 is enabled. When T2EN is cleared, Transmitter 2 is
disabled and the SDO2 line is set to high level. If T0EN, T1EN, and T2EN are cleared,
the SAI transmitter section is disabled and enters the individual reset state. The T2EN
bit is cleared during hardware reset and software reset.
6.3.4.4 TCS Transmitter Master (TMST)—Bit 3
The read/write control bit Transmitter Master ( TMST) determines whether the
transmitter section operates in the Master or Slave mode. When TMST is set, the SAI
transmit section is configured as master. In the Master mode, the transmitter drives
the SCKT and WST pins. When TMST is cleared, the SAI transmitter section is
configured as a slave. In the Slave mode, the SCKT and WST pins are driven from an
external source. The TMST bit is cleared during hardware reset and software reset.
6.3.4.5 TCS Transmitter Word Length Control (TWL[1:0])—Bits 4 & 5
The read/write control bits Transmitter Word Length (TWL[1:0]) are used to select
the length of the data words transmitted by the SAI. The data word length is defined
by the number of serial clock cycles between two edges of the word select signal.
Word lengths of 16, 24, or 32 bits may be selected, as shown in Table 6-4.
If the 16-bit word length is selected, the 16 MSBs of the transmit data registers will be
transmitted according to the data shift direction selected (see TDIR bit, below). If
32-bit word length is selected, the 24-bit data word from the transmit data register is
expanded to 32 bits according to the TDWE control bit (see TDWE, below). TWL[1:0]
are also used to generate the word select indication when the transmitter is
configured as master (TMST = 1). The TWL[1:0] bits are cleared during hardware
reset and software reset.
6.3.4.6 TCS Transmitter Data Shift Direction (TDIR)—Bit 6
The read/write Transmitter data shift Direction (TDIR) control bit selects the shift
direction of the transmitted data. When TDIR is cleared, transmit data is shifted out
MSB first. When TDIR is set, the data is shifted out LSB first (see Figure 6-10). The
TDIR bit is cleared during hardware reset and software reset.
Table 6-4 Transmitter Word Length
TWL1 TWL0 Number of Bits per Word
0 0 16
0 1 24
1 0 32
1 1 Reserved