Motorola DSP56012 - Manual (Page 135)

Parallel Host Interface
Host Interface (HI)
MOTOROLA DSP56012 User’s Manual 4-55
The actual code used in the bootstrap program is provided in Appendix A .
Figure 4-31 Bootstrap Using the Host Interface
HOST
SETTING HF0 TERMINATES BOOTSTRAP LOADING AND STARTS
EXECUTION AT LOCATION P:$0000.
HOST ADDRESSCONTENTS LOADED
WRITTENTO INTERNAL Program RAM at:
4 (DUMMY)
5P:$0000 High BYTE
6P:$0000 Mid BYTE
7P:$0000 Low BYTE
••
••
••
4 (DUMMY)•
5P:$01FF High BYTE
6P:$01FF Mid BYTE
7P:$01FF Low BYTE
SET HF0 FOR EARLY TERMINATION
• Because the DSP56012 is so fast, host handshaking is generally not required.
DSP56012
HR/W
HEN
H[7:0]
F32 F32
F32
F32
LS09
ADDRESS
DECODE
1 K
+5 V
HOA0–HOA2
LDS
AS
DTACK
A1–A3
D0–D7
R/W
A4–A23
8
3
MC68000
(12.5 MHz)
MODA/IRQA
RESET
MODB/IRQB
MDB301
*
+5 V
FROM OPEN COLLECTOR
BUFFER
RESET
FUNCTION
FROM
COLLECTOR
BUFFER
HACK
MODC/NMI
DR
Notes: 1. *This diode must be a Schottky diode.
2. All resistors are 15 K Ω unless noted otherwise.
3. When in Reset, IRQA, IRQB and NMI must
be deasserted by external peripherals.
$0 INTERRUPT CONTROL REGISTER (ICR)
(READ/WRITE)
INIT HF1 HF0 TREQ RREQ
7 0
HM0 HM1
6 5 4 3 2 1
0
AA0337k
MDB301
*
FROM OPEN