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3 serial audio interface programming model, Figure64 sai registers, Serial audio interface programming model -8 – Motorola DSP56012 User Manual

Page 186: Figure 6-4, Sai registers -8

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6-8

DSP56012 User’s Manual

MOTOROLA

Serial Audio Interface

Serial Audio Interface Programming Model

6.3

SERIAL AUDIO INTERFACE PROGRAMMING MODEL

The Serial Audio Interface registers that are available to the programmer are shown
in Figure 6-4. The registers are described in the following paragraphs.

The SAI interrupt vectors can be located in either of two different regions in memory.
The transmit interrupt vector locations are controlled by TXIL bit in the Transmit
Control Status (TCS) register. Similarly, the receive interrupt vector locations are
controlled by RXIL bit in the Receive Control Status (RCS) register. The interrupt
vector locations for the SAI are shown in Table 6-1. The interrupts generated by the
SAI are prioritized as shown in Table 6-2.

Figure 6-4 SAI Registers

PM0

0

1

PM2

2

PM3

3

PM4

4

5

PM6

6

PM7

7

PSR

8

9

10

11

12

13

14

15

Baud Rate Control Register (BRC)

R0EN

0

1

RMST

2

RWL0

3

RWL1

4

5

RDIR

6

RLRS

7

RCKP

8

RREL

9

RDWT

10

RXIE

11

12

13

RLDF

14

RRDF

15

Receive Control/Status Register (RCS)

T0EN

0

1

TMST

2

TWL0

3

TWL1

4

5

TDIR

6

TLRS

7

TCKP

8

TREL

9

TDWE

10

TXIE

11

12

13

TLDE

14

TRDE

15

Transmit Control/Status Register (TCS)

T1EN

PM1

PM5

Reserved Bit(s)

T2EN

R1EN

Receiver 0 Data Register

0

23

Receiver 1 Data Register

0

23

Transmitter 0 Data Register

0

23

Transmitter 1 Data Register

0

23

Transmitter 2 Data Register

0

23

read-only

read-only

write-only

write-only

write-only

X: $FFE2

X: $FFE3

X: $FFE5

X: $FFE6

X: $FFE7

X: $FFE0

X: $FFE1

X: $FFE4

TXIL

RXIL

AA0430k

23

16

23

16

23

16