Motorola DSP56012 - Manual (Page 244)

B-12 DSP56012 User’s Manual MOTOROLA
Programming Reference
Register and Y memory
data move (.....)S1,D1 Y:,D2 mv mv * * - - - - - -
(.....)S1,D1 S2,Y:
(.....)S1,D1 #xxxxxx,D2
(.....)Y0,A A,Y:
(.....)Y0,B B,Y:
Long memory data move (.....)L:,D mv mv * * - - - - - -
(.....)L:,D
(.....)S,L:
(.....)S,L:
XY memory data move (.....)X:,D1 Y:,D2 mv mv * * - - - - - -
(.....)X:,D1 S2,Y:
(.....)S1,X: Y:,D2
(.....)S1,X: S2,Y:
MOVE(C) X:,D1 1+ea 2+mvc ? ? ? ? ? ? ? ?
X:,D1
S1,X:
S1,X:
Y:,D1
Y:,D1
S1,Y:
S1,Y:
S1,D2
S2,D1
#xxxx,D1
#xx,D1
MOVE(M) P:,D 1+ea 2+mvm ? ? ? ? ? ? ? ?
S,P:
S,P:
P:,D
MOVE(P) X:,D 1+ea 2+mvp ? ? ? ? ? ? ? ?
X:,X:
Table B-3 Instruction Set Summary (Sheet 5 of 7)
Mnemonic Syntax Parallel Moves Instruction
Program
Words
Osc.
Clock
Cycles
Status Request
Bits:
S L E U N Z V C
- indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition; see the instruction descriptions in Appendix A of
the
DSP56000 Family Manual (DSP56KFAMUM/AD)
0 indicates that the bit is cleared