Motorola DSP56012 - Manual (Page 144)

4-64 DSP56012 User’s Manual MOTOROLA
Parallel Host Interface
Host Interface (HI)
The HOREQ will be active immediately after initialization is completed (depending
on hardware) because the default data direction is from the host to the DSP, and
TXH, TXM, and TXL registers are empty. When the host writes data to TXH, TXM,
and TXL, this data will be immediately transferred to the HORX. If the DSP is due to
work in Interrupt mode, HRIE must be enabled.
4.4.8.3.3 DSP to HI —Internal Processing
The following procedure outlines the steps that the HI hardware takes to transfer
DMA data from DSP memory to the host data bus.
1. On the DSP side of the HI, a host transmit interrupt will be generated when
HTDE = 1 and HTIE = 1. The interrupt routine must write HOTX, thereby
setting HTDE = 0.
2. If RXDF = 0 and HTDE = 0, the contents of HOTX will be automatically
transferred to RXH:RXM:RXL, thereby setting RXDF = 1 and HTDE = 1. Since
HTDE = 1 again on the initial transfer, a second host transmit interrupt will be
generated immediately, and HOTX will be written, which will clear HTDE
again.
3. When RXDF is set, the HI’s internal DMA address counter is loaded (from
HM1 and HM0) and HOREQ is asserted.
4. The DMA controller enables the data from the appropriate byte register onto
H0–H7 by asserting HACK. When HACK is asserted, HOREQ is deasserted
by the HI.
5. The DMA controller latches the data presented on H[0:7] and deasserts
HACK. If the byte register read was not RXL (i.e., not $7), the HI’s internal
DMA counter increments, and HOREQ is again asserted. Steps 3, 4, and 5 are
repeated until RXL is read.
6. If RXL was read, RXDF will be cleared and, since HTDE = 0, the contents of
HOTX will be automatically transferred to RXH:RXM:RXL, and RXFD will be
set. Steps 3, 4, and 5 are repeated until RXL is read again.
Note: The transfer of data from the HOTX register to the RXH:RXM:RXL registers
automatically loads the DMA address counter from the HM1 and HM0 bits
when in the DMA DSP-Host mode. This DMA address is used within the HI
to place the appropriate byte on H[0:7].