Motorola DSP56012 - Manual (Page 229)

Bootstrap ROM Contents
MOTOROLA DSP56012 User’s Manual A-3
A.1 INTRODUCTION
This section presents the bootstrap programs (ROM code) contained in the DSP.
A.2 BOOTSTRAPPING THE DSP
The bootstrap ROM for the DSP occupies locations 0–31 ($0–$1F) of the DSP56012
memory map. The DSP can bootstrap from an external device attached to the Host
Interface (HI), through the Serial Host Interface (SHI) using the SPI protocol, or
through the SHI using the I
2
C protocol, depending on how the three mode pins
(MODC, MODB, and MODA) are configured.
The bootstrap ROM is factory-programmed to perform the bootstrap operation
following hardware reset.
Note: If MC:MB:MA = 000 at reset, a hardware override forces the chip into Mode 1
before it enters the bootstrap routine.
During the bootstrap program, the DSP looks at the mode bits (MA, MB, and MC) in
the OMR, which are loaded with the values present on the MODC, MODB, and
MODA pins upon exit from reset. The bootstrap program evaluates the MA bit first,
then the MC bit, and finally the MB bit to determine which bootstrap method to use.
• MA = 0 (i.e., MC:MB:MA = xx0)—The bootstrap program immediately
terminates by jumping to the program ROM and starts executing the program
at location P:$0A00. (Mode 4)
• MA = 1 and MC = 0 (i.e., MC:MB:MA = 0x1)—The program loads up to 256
24-bit words into the internal Program RAM from the Host Interface, starting
at P:$0. If less than 256 words are to be loaded, the Host Interface bootstrap
load program can be stopped by setting Host Flag 0 (HF0). This terminates the
bootstrap loading operation and starts executing the loaded program at
location P:$0 of the internal Program RAM. (Mode 1)
• MA = 1 and MC = 1 (i.e., MC:MB:MA = 1x1)—The program loads 256 24-bit
word into the internal Program RAM from the Serial Host Interface, starting at
P:$0. The MB bit value selects the protocol under which data is loaded:
– MB = 0—The SHI uses the SPI protocol. (Mode 5)
– MB = 1—The SHI uses the I
2
C protocol. (Mode 7)