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Motorola DSP56012 User Manual

Page 246

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B-14

DSP56012 User’s Manual

MOTOROLA

Programming Reference

Y:

S

#xxx

RESET

1

4

- - - - - - - -

RND

D

(parallel move)

1+mv

2+mv

* * * * * * * -

ROL

D

(parallel move)

1+mv

2+mv

* * - - ? ? 0 ?

ROR

D

(parallel move)

1+mv

2+mv

* * - - ? ? 0 ?

RTI

1

4+rx

? ? ? ? ? ? ? ?

RTS

1

4+rx

- - - - - - - -

SBC

S,D

(parallel move)

1+mv

2+mv

* * * * * * * *

STOP

1

n/a

- - - - - - - -

SUB

S,D

(parallel move)

1+mv

2+mv

* * * * * * * *

SUBL

S,D

(parallel move)

1+mv

2+mv

* * * * * * ? *

SUBR

S,D

(parallel move)

1+mv

2+mv

* * * * * * * *

SWI

1

8

- - - - - - - -

Tcc

S1,D1

1

2

- - - - - - - -

S1,D1 S2,D2

TFR

S,D

(parallel move)

1+mv

2+mv

* * - - - - - -

TST

S

(parallel move)

1+mv

2+mv

* * * * * * 0 -

WAIT

1

n/a

- - - - - - - -

Table B-3

Instruction Set Summary (Sheet 7 of 7)

Mnemonic

Syntax

Parallel Moves

Instruction

Program

Words

Osc.

Clock

Cycles

Status Request

Bits:

S L E U N Z V C

- indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition; see the instruction descriptions in Appendix A of
the

DSP56000 Family Manual (DSP56KFAMUM/AD)

0 indicates that the bit is cleared