Motorola DSP56012 - Manual (Page 231)

Bootstrap ROM Contents
MOTOROLA DSP56012 User’s Manual A-5
bcr equ $fffe ; BCR Register
pbc equ $ffec ; Port B Control Register
hsr equ $ffe9 ; HOST Status Register
horx equ $ffeb ; HOST Receive Register
hf0 equ 3 ; HOST HF0 flag
hrdf equ 0 ; HOST RX Full flag
hrne equ 17 ; SHI FIFO Not Empty flag
hrx equ $fff3 ; SHI HRX FIFO
hcsr equ $fff1 ; SHI Control/Status Register
hi2c equ 1 ; SHI IIC Enable Control Bit
ma equ 0 ; OMR Mode A
mb equ 1 ; OMR Mode B
mc equ 4 ; OMR Mode C
org p:$0 ; bootstrap code starts at $0
start move #$000A00,a0 ; Program ROM starting address($0A00)
move #<0,r0 ; r0 points to internal Program RAM
jclr #ma,omr,exit ; if MC:MB:MA = xx0 goto Program ROM
downld
clr a #$A9,r1 ;clear a0—Program RAM starting address
; prepare SHI control value in r1
; HEN = 1, HI2C = 0, HM1-HM0 = 10, HFIFO = 1, HMST = 0,
; HRQE1-HRQE0 = 01, HIDLE = 0, HBIE = 0, HTIE = 0, HRIE1-HRIE0 = 00
jset #mc,omr,shild ; If MC:MB:MA = 1X1 load from SHI
; “hostld” is the routine that loads from the parallel Host Interface.
; If MC:MB:MA = 001, the internal Program RAM is loaded with up to 256 words
; from an external device connected to the Host Interface.
hostld
bset #0,x:pbc ; configure Port B as Host Interface
do #256,_loop1
_LBLA jclr #hf0,x:hsr,_LBLB ; if HF0 = 1, stop loading data
enddo ; must terminate the loop
jmp <_loop1
_LBLB
jclr #hrdf,x:hsr,_LBLA ; wait for data present
movep x:horx,p:(r0)+ ; store in Program RAM
_loop1
jmp ; Exit bootstrap ROM