RIGOL DP832A - Manual (Page 23)

Chapter 1 Programming Overview RIGOL
DP800 Programming Guide 1-13
Status Byte Register
The status byte register reports the status information of the other status registers. The bit4 (MAV, Message
Available Bit) in the status byte register will report immediately when querying the data waiting to be
queried in the output buffer of the power supply. The bits in the SUMMARY register of the status byte
register are not latched. The corresponding bit in the SUMMARY register of the status byte register will be
cleared when the event register is cleared. The bit4 (MAV, Message Available Bit) will be cleared when
reading all the information including any pending queries in the output buffer. The definitions of the bits in
the status byte register and the corresponding decimal values of their binary weights are as shown in Table
1-6.
Table 1-6 Definitions of the bits in the status byte register and the corresponding decimal values of their
binary weights
Bit Decimal Value Definition
0-2 Not used 0 Always be 0.
3 QUES 8
One or more bits in the questionable status register are
set (the bits in the enable register must be enabled)
4 MAV 16
The data in the output buffer of the power supply is
available.
5 ESB 32
One or more bits in the standard event register are set
(the bits in the enable register must be enabled)
6 RQS 64 The power supply is requesting for service.
7 Not used 0 Always be 0.