Command abbreviation, Scpi status registers, Command abbreviation -5 – RIGOL DP832A User Manual
Page 15: Scpi status registers -5, Event register, Enable register, Multi-logic output
Chapter 1 Programming Overview
RIGOL
DP800 Programming Guide
1-5
5 ASCII String
The parameter should be the combinations of ASCII characters. For example, in the :MMEMory:STORe
characters, English characters and numbers.
Besides, many commands contain the MINimum and MAXimum parameters which are used to set the
parameter to its minimum or maximum value. For example, MINimum and MAXimum in
the :SYSTem:BRIGhtness {
the minimum or maximum.
Command Abbreviation
All the commands are case-insensitive and you can use any of them. If abbreviation is used, all the capital
letters in the command must be written completely. For example, the :ANALyzer:ANALyze command can be
abbreviated to :ANAL:ANAL.
SCPI Status Registers
All the SCPI instruments execute the status register operations in the same way. The status system records
the various instrument states into three register sets: status byte register, standard event register and
questionable status register sets. The status byte register records the advanced summary information
reported by other register sets. The SCPI status systems of the DP800 series multi-channel models (take
DP831A as an example) and single-channel model (take DP811A as an example) are as shown in Figure 1-2
and Figure 1-3 respectively.
Event Register
The event register is read-only and is used to report some states of the power supply defined internally. All
the bits in the event register are latched and once an event bit is set, the later state (state of the event
represented by this bit) changes will all be ignored. The event register bits will be cleared automatically
when you send command to query the event register (such as the
command to clear the register, but the reset command (
) will not clear
the bits in the event register. When querying the event register, the query returns a decimal value
corresponding to the sum of the binary weights of all the bits in the register.
Enable Register
The enable register is both readable and writable. It is used to define which status information will be
reported to the next-level. The bits in the enable register will not be cleared when you send command to
query the enable register or send the
command to clear the register state (but the
can clear the bits in the event register). To enable the bits in the enable register, you need to write into the
register a decimal value corresponding to the sum of the binary weights of the bits to be enabled in the
register.
Multi-logic Output
This part is only applicable to multi-channel models. Take DP831A as an example. The 3-logic output of the
power supply includes a channel questionable status register and three independent channel questionable
status SUMMARY registers (corresponding to the logic outputs of the three channels respectively). The
channel questionable status SUMMARY registers report the status of each channel to the channel
questionable status register which then reports the channel status to the bit13 (ISUM bit) of the